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Optimization of supporting cryptographic operations using hardware
Čurilla, Jakub ; Smékal, David (referee) ; Cíbik, Peter (advisor)
This work deals with the description of FPGA architecture circuits, their structure, VHDL language, FPGA design flow, cryptography and cryptographic operations, and subsequent implementation and realization of support functions for cryptographic operations in VHDL language, their time and performance analysis, and mutual comparison.
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Simplified Multiplication in Convolutional Neural Networks
Juhaňák, Pavel ; Jaroš, Jiří (referee) ; Sekanina, Lukáš (advisor)
This thesis provides an introduction to classical and convolutional neural networks. It describes how hardware multiplication is conventionally performed and optimized. A simplified multiplication method is proposed, namely multiplierless multiplication. This method is implemented and integrated into the TypeCNN library. The cost of the hardware solution of both conventional and simplified multipliers is estimated. The thesis also introduces software tools developed to work with convolutional neural networks and datasets used to test them in the image classification task. Test architectures and experimentation methodology are proposed. The results are evaluated, and both the classification accuracy and cost of the hardware solution are discussed.
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Laboratory device with analog computational unit AD538
Hruboš, Zdeněk ; Slezák, Josef (referee) ; Petržela, Jiří (advisor)
An analog multiplier are circuits, that are realized multiplication of two analog signals. They can be made by suitable connection (according to function) discreet parts. Nowadays there are integrated circuits in advance function, whose internal structure is made by complex of circuits with operating ampfliers and other circuits. These circuits have a very high accuracy of arithmetic operation which is mostly better than 1%. The analog multiplier are used in situation, when we need realize multiplication, division, exponentation, square root extraction and logarithmic calculation of analog signals. In the next are used in circuits for multiplication of frequency, shifting of frequency, amplitude modulation, detection phase angel of two signals with the same frequency, etc. The AD538 is a monolithic real-time computational circuit that provides precision analog multiplication, division and exponentiation. The combination of low input and output offset voltages and excellent linearity results in accurate computation over an unusually wide input dynamic range.
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Accurate wattmeter for measure power loss in feromagnetic controlled AVR
Smutný, Martin ; Drexler, Petr (referee) ; Roubal, Zdeněk (advisor)
Electronic wattmeters excel in very small (up to negligible) own consumption. The basiccomponents of these devices is the multiplier - a circuit whose output voltage is proportional to the product of input voltage. Wattmeter is a device that contains two coils, one of which is the current coil voltage and the second coil. Current coil is connected in series with the measured electrical circuit and the voltage measuredparallel to the coil circuit. Current flowing through the coil current causes a magnetic field is proportional to the current flowing through the phase shift and. Electromagnetic fields of both coils influence each other in case of measurements in a DC circuit, the resultingdeflection proportional to both voltage and current. When measured in AC electrical powercircuits can be determined using the effective values of current and voltage, and their mutualphase shift. A magnetic induction B can be determined using mean values. An analog multiplier are circuits, that are realized multiplication of two analog signals. They can be made by suitable connection (according to function) discreet parts. Nowadays there are integrated circuits in advance function, whose internal structure is made by complex of circuits with operating ampfliers and other circuits. These circuits have a very high accuracy of arithmetic operation which is mostly better than 1%. The analog multiplier are used in situation, when we need realize multiplication, division, exponentation, square root extraction and logarithmic calculation of analog signals.
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Multiple Operation Simulation
Závada, Vladislav ; Šátek, Václav (referee) ; Kunovský, Jiří (advisor)
This work deals with the numeric integration. The reader is acquainted with the numerical solution of differential equations using Taylor series method. Then describes the different variants integrators. The practical part describes the design double-input integrator with multiplication and its implementation in an FPGA. For this integrator is also provided a simulator demonstrate its function.
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Analysis of multiplication methods and their application to teaching aids
BOUDOVÁ, Anna
The aim of the dissertation is to analyse various methods of multiplication. Present and historical methods of multiplication will be included in analysis. Each method will be described and then they will be compared together. Based on some selected methods didactic aids will be created to support the teaching of mathematics. There will be following process of elaboration: - Research of literature related to the issue - Analysis of methods of multiplication - Study of Framework Education Programme for Basic Education - Analysis of the development of multiplication in selected sets of textbooks - Comparison of multiplication methods - Creation of didactic aids
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Optimization of supporting cryptographic operations using hardware
Čurilla, Jakub ; Smékal, David (referee) ; Cíbik, Peter (advisor)
This work deals with the description of FPGA architecture circuits, their structure, VHDL language, FPGA design flow, cryptography and cryptographic algorithms, and subsequent implementation and realization of support functions for cryptographic operations in VHDL language, their time and performance analysis, and mutual comparison.
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Optimization of supporting cryptographic operations using hardware
Čurilla, Jakub ; Smékal, David (referee) ; Cíbik, Peter (advisor)
This work deals with the description of FPGA architecture circuits, their structure, VHDL language, FPGA design flow, cryptography and cryptographic operations, and subsequent implementation and realization of support functions for cryptographic operations in VHDL language, their time and performance analysis, and mutual comparison.
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Multiplication of shape as a means of constructing reality
Málková, Helena ; Magidová, Markéta (advisor) ; Čech, Viktor (referee)
Málková, H.: Multiplication of shape as a means of constructing reality. [Diplom thesis] Prague 2017 - Charles University, Faculty of Education, Department of Art Education, 123 pages. The diploma thesis focuses on the theme of creation of systems, structures and constructions in visual reality. The theoretical part is aimed at the possibilities of multiplication, its growth into space or a plane, while regarding creation of plastic arts by selected artists from the field of fine arts. The practical part introduces author's conception of the topic by the means of photographic medium. Structure is a crucial phenomena in possible understanding of visual reality. It has prerequisites for development of transcendental thinking. We can discover it throughout the whole universe as its unifying element. The findings from the theoretical part are used as basis for didactic activities. The didactic part presents the realized art assignments, which are a part of the implementation of the research. The thesis brings findings and conclusions within the framework of the results of creation and teaching of the topic of spatial composition of multiplied form within a coherent object. KEY WORDS: construction, structure, movement, shape, space, material variability, racionality, photography, object creation,...
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Simplified Multiplication in Convolutional Neural Networks
Juhaňák, Pavel ; Jaroš, Jiří (referee) ; Sekanina, Lukáš (advisor)
This thesis provides an introduction to classical and convolutional neural networks. It describes how hardware multiplication is conventionally performed and optimized. A simplified multiplication method is proposed, namely multiplierless multiplication. This method is implemented and integrated into the TypeCNN library. The cost of the hardware solution of both conventional and simplified multipliers is estimated. The thesis also introduces software tools developed to work with convolutional neural networks and datasets used to test them in the image classification task. Test architectures and experimentation methodology are proposed. The results are evaluated, and both the classification accuracy and cost of the hardware solution are discussed.
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